CURRICULUM VITAE

Morteza SahebkarKhorasani

1950 Evergreen Terrace Dr.w

Apt #5, Carbondale, IL, 62901

(618)303-3931

  morteza.sahebkar@siu.edu

I. Education:

• Master of Science in Electrical & Computer Engineering,

Southern Illinois University at Carbondale, May 2015, GPA 4.0

• Bachelor of Science in Electrical Engineering,

Sadjad University of Mashhad, September 2011, GPA 4.0

• Associate College Degree in Electrical Engineering

Shahid Montazeri College, February 2009, GPA 4.0

II. Research Interests:

• Analog VLSI

• Digital VLSI

• Mixed VLSI

• RF-IC Design

• Wireless Sensor Networks

• Nano electronic Devices

• Neural Network & Genetic Algorithm

III. Publications:

• Seyedmorteza Sahebkarkhorasani,”Nano wire Junction less Field Effect Transistor”,

SIUC Symposium, Nov. 2014

• Ali B. Haghighi, Seyedmorteza S.khorasani, et. al., “A Novel Robust Digital Image

Watermarking Scheme Based on Admixture RDWT-DCT-SVD Method”, International

Journal of Research and Reviews in Computer Science (IJRRCS), Vol. 3, No 4,

September 2014

• "A Novel Design of Multi-Band Micro strip Patch Fractal Antenna" in

21st Iranian Conference on Electrical Engineering (ICEE2013), December 2012

IV. Teaching Experiences:

• Teaching Assistant for “IST-336-001 - Web Based Apps Info Systems”

August 2014-December 2014, Southern Illinois University

• Teaching Assistant for “IST-331-001 – JAVA Programming 2”

January 2014-May 2014, Southern Illinois University

• Teaching Assistant for “IST-336-001 - Web Based Apps Info Systems”

August 2013-December 2013, Southern Illinois University

• Lab Assistant for "Digital Circuit Design"

January 2011-May 2011, Sadjad University of Technology

• Teaching Assistant for “Analog VLSI”

January 2010-May 2010, Sadjad University of Technology

V. Research Experiences:

• Multi-Stage Resistor-based memory(Memristor), Master of Science thesis,

Southern Illinois University at Carbondale, December 2014

• Complex Network model of Wireless Sensor Network, Technology Department,

Southern Illinois University at Carbondale, January 2014- December 2014

VI. Certificates & Work Experience

• Circuit Designer, Saman-Pouyesh System Corporation, Mashhad, Iran,

Summers 2008-2011

• Certificate of Automotive Electronic System Technician, Iran Khodro Technical

Training Center, July 2008

• Certificate of Cell-phone Technician Training, Khorasan Technical & Vocational

Training Organization, Mashhad, Iran, January 2007

VII. Computer Skills

• Programming Languages: Assembly, Basic, VHDL,C++, HTML, Html5, Css,

JavaScript, Java programming,Verilog A.

• Software: Matlab, Cadence, Aptana, Eclipse, Pspice, Proteus, DXP,

Advance Design System (ADS), Synopsys Sentaurus,Linux,Unix

VIII. Honors:

• Ranked 4th among about 100,000 participants in Iran’s nation-wide university entrance

examination

IX. Technical Skills:

• Skilled at programming microprocessors (8085&8086) & micro controller (AT MEGA

32&16&8).

• Skilled at electronic semiconductor test equipment, integrated circuit design and

computer aided tools for circuit or device level simulations

• FPGA simulation and ASIC design.

• Developing experience of Routing and Parasitic (RC) rules for nodes ranging from

45nm to 90nm

• Experience in resolving various Block level/chip level Timing (STA), Noise, Place and

Route, DRC, LVS, QRC

• Understanding of RF_IC Impedance matching, RLC resonant Circuits and Noise

vulnerability

• Hands-on experience in design schematic capture, floor planning, routing, and logic

equivalency, physical and electrical verification, timing closure

• Expertise on any of the industry standard place and route tools like Cadence

• Strong analytical capabilities and Ability to work with a broader team

X. References:

• References are available upon request.